Lab Homework #7:

 Design, build and test a buffer circuit employing Tanner Tools. Construct a buffer employing two NAND2C gates from the SCMOS library (connect both inputs of a NAND gate together to obtain an inverter). Measure the gate delay two ways: (i) direct analysis from S-Edit to T-Spice, (ii) layout the circuit by employing HP's 0.8 micron n-well technology, extract parasitic capacitances and then test with T-Spice. Compare the gate delays with the two approaches. In your calculations employ the ml2_125 model file and VDD=5.0 V.