Schedule

WeekLectureLab
(1) 09.05.12
09.07.12		 Introduction to digital circuits.
  • Integrated circuits, layout, goals of the course, etc.
  • Generic voltage transfer characteristics: VOH, VOL, VIH, VIL.
  • Definition of gate delay: tPHL, tPLH, tP.
  • Quantization of voltages, regeneration of output and immunity to noise.
  • Review of MOS logic families.
  • Introduction to Tanner Tools
  • Design an Inverter
  • Design a NAND gate
  • Gate Delays
(2) 09.12.12
09.14.12		 MOS Logic Circuits.
  • Review of MOS and BJT logic families.
  • MOS I-V characteristics; ohmic, triode, saturation, body-effect
  • MOS Spice models: LEVEL, W, L, Vto, l,g,fF, kp, tox, Cox.
  • CMOS voltage transfers characteristics (VTC).
  • Hierarchical design approach
  • Design of half and full adder
(3) 09.19.12
09.21.12		 MOS Logic Circuits
  • More on Spice parameters
  • Calculation of VTC for CMOS circuits
  • Computation of critical points
  • Body Effect in CMOS gates
  • Effect of scaling on cmos logic circuits
  • Design of MUX
  • Boolean functions using MUX
(4) 09.26.11
09.28.11		 CMOS Logic Circuits
  • Calculation of gate delay and power for MOS circuits
  • Adjusting transistor widths in NAND, NOR gates, etc. to obtain equivalent switching
  • VTC Analysis
  • Power Consumption
  • Introduction to midterm project
(5) 10.03.12 10.05.12 CMOS Circuits:
  • Adjusting transistor widths in NAND, NOR gates, etc. to obtain equivalent switching
  • Introduction to latches and flip-flops
  • Midterm Project Presentation
(6) 10.10.12 10.12.12 CMOS Circuits:
  • Latches
  • Flip/Flops
  • Astable multivibrator implemented with CMOS gates
  • Latches
  • Flip Flops
(7) 10.17.12 10.19.12 CMOS Circuits:
  • Clock Circuits: Ring Oscillator
  • astable multivibrator; monostable multivibrator
  • State Machine
(8) 10.24.12 10.26.12 CMOS Circuits:
  • Pass Transistor logic, Transmission gates, Dynamic logic circuits
  • Counters
(9) 10.31.12 11.02.12 BJT Based Digital Logic Circuits:
  • BJT Inverter Fan-Out, gate delay, Schottky diode BJT's.
  • Historical development: From BJT Inverter to TTL
  • Shift Registers
  • Introduction to final project
(10) 11.07.12 11.09.12 BJT Logic Circuits:
  • Standard and Schottky TTL Logic
  • Switching characteristics; totem pole configuration
  • Final project review
(11) 11.14.12 11.16.12 Transmission Gates, Buffers and tri-state logic:
  • Transmission gates
  • Buffers
  • Tri-state logic
  • Final project review
(12) 11.21.12 11.23.12 Transmission Gates, Buffers and tri-state logic:
  • BiCMOS Logic, ECL and Schmitt Trigger Circuits
  • Final Project Discussion
  • Final project review
(13) 11.28.12 11.30.12 Memory circuits:
  • DRAM, SRAM, and other memories
  
(14) 12.05.12 12.07.12 Review
  • Final exam review
  • Final project demonstration
15. Final Exam