Schedule

WeekLectureLab
1. Introduction to digital circuits.
  • Integrated circuits, layout, goals of the course, etc.
  • Generic voltage transfer characteristics: VOH, VOL, VIH, VIL.
  • Definition of gate delay: tPHL, tPLH, tP.
  • Quantization of voltages, regeneration of output and immunity to noise.
  • Review of MOS logic families.
  • Introduction
  • Digital circuit design overview
  • Tanner tools demonstration
    • S-Edit
    • T-Spice
    • W-Edit
    • L-Edit
    • LVS
2. MOS Logic Circuits.
  • Review of MOS and BJT logic families.
  • MOS I-V characteristics; ohmic, triode, saturation, body-effect
  • MOS Spice models: LEVEL, W, L, Vto, l,g,fF, kp, tox, Cox.
  • CMOS voltage transfers characteristics (VTC).
  • Hierarchical design approach
  • CMOS buffer (2 cascaded CMOS inverters)
  • Gate delays
  • Tanner tools Libraries
3. MOS Logic Circuits
  • More on Spice parameters
  • Calculation of VTC for CMOS circuits
  • Computation of critical points
  • Body Effect in CMOS gates
  • Effect of scaling on cmos logic circuits
  • More features of Tanner tools
  • L-Edit
4. CMOS Logic Circuits
  • Calculation of gate delay and power for MOS circuits
  • Adjusting transistor widths in NAND, NOR gates, etc. to obtain equivalent switching
  • VTC Analysis
  • Power Consumption
5. CMOS Circuits:
  • Adjusting transistor widths in NAND, NOR gates, etc. to obtain equivalent switching
  • Introduction to latches and flip-flops
  • Half Adder
  • Full Adder
6.0 CMOS Circuits:
  • Latches
  • Flip/Flops
  • Astable multivibrator implemented with CMOS gates
  • Multiplexer
  • Parity Generator
  • Other boolean functions using MUX
7. CMOS Circuits:
  • Clock Circuits: Ring Oscillator
  • astable multivibrator; monostable multivibrator
  • Latches and Flip Flops
  • Introduction to mid term project
8. CMOS Circuits:
  • Pass Transistor logic, Transmission gates, Dynamic logic circuits
  • Review of Midterm Project
9. BJT Based Digital Logic Circuits:
  • BJT Inverter Fan-Out, gate delay, Schottky diode BJT's.
  • Historical development: From BJT Inverter to TTL
  • VLSI Scaling
10. BJT Logic Circuits:
  • Standard and Schottky TTL Logic
  • Switching characteristics; totem pole configuration
  • Presentation of Midterm Project
  • Introduction to Final Project
11. Transmission Gates, Buffers and tri-state logic:
  • Transmission gates
  • Buffers
  • Tri-state logic
  • Review Final Project
12. Transmission Gates, Buffers and tri-state logic:
  • BiCMOS Logic, ECL and Schmitt Trigger Circuits
  • Final Project Discussion
  • Review Final Project
  • Comments and suggestions
13. Memory circuits:
  • DRAM, SRAM, and other memories
  
14. Review
  • Final exam review
  • Final project demonstration
15. Final Exam