Experiments
EXPERIMENT 1. INVERTER
EXPERIMENT 2. NAND Gates
EXPERIMENT 3. AND and OR Gates
EXPERIMENT 4. Exclusive-OR (XOR) Gates
EXPERIMENT 5. Sum-of-Products Realization
EXPERIMENT 6. Product-of- Sums Realization
EXPERIMENT 7. Multiplexer
EXPERIMENT 8. Seven Segment Decoder
EXPERIMENT 9. J- K Flip-Flop
EXPERIMENT 10. 2-bit Full Adder
EXPERIMENT 11. 4-bit counter using JK Flip Flop
EXPERIMENT 12. Getting Started with Verilog HDL
EXPERIMENT 13. Design and Implementation of a Full Adder using Verilog HDL
EXPERIMENT 14. Design and Implementation of a Multiplexer using verilog HDL