Summer
2002 Weekly Outline and Goals
-
Introduction
to digital circuits.
Lecture:
·Integrated
circuits, layout, goals of the course, etc.
·Generic
voltage transfer characteristics: VOH, VOL, VIH, VIL.
·Definition
of gate delay: tPHL, tPLH, tP.
·Quantization
of voltages, regeneration of output and immunity to noise.
·Review
of MOS logic families.
Laboratory:
·Introduction
·Digital
circuit design overview
·Tanner
tools demonstration
·S-Edit
·T-Spice
·W-Edit
·L-Edit
·LVS
-
MOS
Logic Circuits.
Lecture:
·Review
of MOS and BJT logic families.
·MOS
I-V characteristics; ohmic, triode, saturation, body-effect
·MOS
Spice models: LEVEL, W, L, Vto, l,g,fF,
kp, tox, Cox.
·CMOS
voltage transfers characteristics (VTC).
Laboratory:
·NOT
gate with DC source and DC pulse
·Buffer
with DC pulse and gate delay
·Schematic
view and symbol view
·NAND
gate with all combinations of inputs
-
MOS
Logic Circuits
Lecture:
·More
on Spice parameters
·Calculation
of VTC for CMOS circuits
·Calculation
of gate delay and power for MOS circuits
Laboratory:
·Review
of logic gates
·Parameter
sweep, power calculation and introduction to L-Edit
-
CMOS
Logic Circuits:
Lecture:
·Midterm
Project Assignment
·More
on VTC
·Computation
of critical points
·Body
Effect in CMOS gates
Laboratory:
·Introduction
to Boolean Algebra
·Half-adder
demonstration
-
CMOS
Circuits:
Lecture:
·Effect
of scaling on cmos logic circuits
·Adjusting
transistor widths in NAND, NOR, etc. gates to obtain equivalent switching
Laboratory:
·Introduction
to Boolean Algebra; NAND gate as Universal Gate; 1-bit and 2-bit Comparator;
Half-Adder Demonstration and Layout
-
CMOS
Circuits:
Lecture:
·Astable
multivibrator implemented with CMOS gates.
·Latches
·Flip/Flops
Laboratory:
·Full
Adder as Combination of two Half-Adders; Multiplexer and Encoders; Multiplexer
as Logic Gates; Demultiplexers
-
CMOS
Circuits:
Lecture:
·Clock
Circuits: Ring Oscillator
·astable
multivibrator; monostable multivibrator
Laboratory:
·Introduction
to Sequential Circuits; Latches and Flip-Flops; Positive Gate Triggering;
D-FF Demonstration
-
BJT
Based Digital Logic Circuits:
Lecture:
·Pass
Transistor logic, Transmission gates, Dynamic logic circuits
Laboratory:
·Demonstration
of Series-to-Parallel Conversion; Troubleshooting Sequential Logic Circuits.
-
BJT
Based Digital Logic Circuits:
Lecture:
·BJT
Inverter Fan-Out, gate delay, Schottky diode BJT’s.
·Historical
development: From BJT Inverter to TTL
Laboratory:
·Midterm
Project Discussion.
·Transmission
Gates, Pass Transistor Logic.
-
BJT
Logic Circuits:
Final
Project Assignment
Lecture:
·Standard
and Schottky TTL Logic
·Switching
characteristics; totem pole configuration
Laboratory:
·Midterm
Project Demonstration
-
Transmission
Gates, Buffers and tri-state logic:
Lecture:
·Transmission
gates
·Buffers
·Tri-state
logic
Laboratory:
·Extracting
from L-Edit to T-Spice.
-
Transmission
Gates, Buffers and tri-state logic:
Lecture:
·BiCMOS
Logic, ECL and Schmitt Trigger Circuits
·Final
Project Discussion
Laboratory:
·Review
Final Project
·Comments
and suggestions
-
Memory
circuits:
Lecture:
·DRAM,
SRAM, and other memories
Laboratory:
-
Review
Lecture:
·Final
exam review
Laboratory:
·Final
Project Demonstration (Wednesday, July 10, 2002, 6:10pm-9:00pm, Tompkins 309)
-
Final
Exam (Thursday, July 11, 2002, 6:10pm-8:40pm, Tompkins 309)
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