Weekly Schedule


			ECE 122 – Digital Electronics and Design Fall 2002 Weekly Outline and Goals 1. Introduction to digital circuits. *Lecture: 9/4/02* ·Integrated circuits, layout, goals of the course, etc. ·Generic voltage transfer characteristics: VOH, VOL, VIH, VIL. ·Definition of gate delay: tPHL, tPLH, tP. ·Quantization of voltages, regeneration of output and immunity to noise. ·Review of MOS logic families. Laboratory: Section 30 and 31 9/6/02 ·No lab. 2. MOS Logic Circuits. *Lecture: 9/9/02* ·Review of MOS and BJT logic families. ·MOS I-V characteristics; ohmic, triode, saturation, body-effect ·MOS Spice models: LEVEL, W, L, Vto, l,g, f_F, k_p, tox, Cox. ·CMOS voltage transfers characteristics (VTC). Lecture H/W#1: Chp. 13: 5, 7, 9, 12, 16, 17 Due date: 9/18/02 Laboratory: Section 30 and 31 9/13/02 Introduction ·Digital circuit design overview ·Tanner tools demonstration ·S-Edit ·T-Spice ·W-Edit ·Transient characteristics ·Parameter sweep ·Gate delays 3. CMOS Circuits *Lecture: 9/16/02* ·More on Spice parameters and basic gate design ·Calculation of VTC for CMOS circuits ·Calculation of gate delay and power for MOS circuits ·Body Effect in CMOS gates Laboratory: Section 30 and 31 9/20/02 ·More features of Tanner tools ·Hierarchy - Modules, sub-modules .Half-Adder 4. CMOS Logic Circuits: *Lecture: 9/23/02* ·More on VTC · Computation of critical points and introduction to CMOS Gate Design. Lecture H/W #2. Click HERE. Due date 10/2/02 Laboratory: Section 30 and 31 9/27/02 ·Gate delay and Average Power Dissipation · Four-bit full adder circuit · Four-to-one multiplexer 5. CMOS Circuits: *Lecture: 9/30/02* ·Effect of scaling on cmos logic circuits · Adjusting transistor widths in NAND, NOR, etc. gates to obtain equivalent switching Laboratory: Section 30 and 31 10/4/02 ·Multiplexers (chip select/enable and use as logic gate) Assign midterm project. 6. Sequential Logic Circuits: *Lecture: 10/7/02* ·Conclude CMOS gate design · Latches · Flip/Flops Laboratory: Section 30 and 31 10/11/02 ·Positive Gate Triggering D flip-flops: design and simulation 7. Sequential CMOS Logic Circuits: *Lecture: 10/14/02* ·Astable multivibrator implemented with CMOS gates. Laboratory: Section 30 and 31 10/18/02 ·Review of Midterm Project 8. Sequential CMOS Logic Circuits: *Lecture: 10/21/02* ·Clock Circuits: Ring Oscillator Latches and flip-flops (D and SC) Gate trigger circuits · Astable multivibrator; monostable multivibrator Laboratory: Section 30 and 31 10/25/02 ·Demonstration of Midterm Project 9. CMOS Transmission Gates: *Lecture: 10/28/02* ·BJT Inverter Fan-Out, gate delay, Schottky diode BJTs. Pass Transistor logic, Transmission gates Laboratory: Section 30 and 31 11/1/02 ·Pass Transistor Logic: Use of transmission gates to demonstrate floating node, construct an XOR gate and 2:1 multiplexer. 10. CMOS Transistor Gates and Pass Transistor Logic: *Lecture: 11/4/02* ·CMOS transmission gates, tri-state logic and pass transistor logic Laboratory: Section 30 and 31 11/8/02 ·Extract parasitic capacitance from layout and simulate with T-Spice. 11. BJT based Logic Circuits: *Lecture: 11/11/02* ·Static and dynamic characteristics of BJT inverters · Schottky BJTs Laboratory: Section 30 and 31 11/15/02 ·Extraction in the case of pads for NAND buffer and Review of Final Project · Comments and suggestions 12. TTL Circuits: *Lecture: 11/18/02* · Historic development of TTL, Standard TTL circuit operation, TTL based logic circuits · Final Project Discussion Laboratory: Section 30 and 31 11/22/02 13. TTL and ECL Logic Circuits: *Lecture: 11/25/02* ·Final remarks on TTL circuits; introduce ECL circuits *Laboratory: 11/29/02* No lab - Thanksgiving holiday 14. Memory Circuits: *Lecture: 12/2/02* ·Introduce SRAM and DRAM memory circuits Laboratory: Section 30 and 31 12/6/02 15. Memory Circuits and Review: *Lecture: 12/9/02* ·Review for Final Laboratory: Section 30 and 31 · Final project demonstration Final Exam