Full Adder
 

• Write down the truth table for a full-adder (the difference between a half-adder and this is that the full-adder has a third input, called the carry-in bit).

• Obtain the logical expressions for the Sum and the Carry bits and try to minimise it as far as possible (points will not be deducted if the expressions have not been reduced to their simplest forms; however, doing it will simplify the following part of the question).

• Design the circuit for the full-adder in the schematic mode and simulate it in T-Spice for all input combinations. Use the same model file that was provided in Homework 1, viz. ml2_hw.md.
• An easy way to simulate the 8 possible input combinations without connecting and disconnecting the sources and grounds over and over again is as follows: For the three inputs, X, Y and Z, use pulse voltage sources (v_pulse) with the following time-periods: 4ns, 2ns and 1ns. Make sure that the total simulation time is atleast 8ns, your starting time is 0s, and the v_pulse source has a 50% duty cycle (making it symmetrical). Plot the three inputs and the two outputs on the graph, and try to figure out how all the eight combinations have been represented by just one transient analysis!
Print a copy of the schematic view and the output plot(s).