Homework #0
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Up Homework #0
Due: Friday, September 7, 2001

XOR Gate

Design and simulate an XOR gate composed of four NAND gates using Tanner tools. Test your result for an input of 0 and 1, and print a copy of your output.

Each NAND gate should have both a schematic view and a symbol view. The completed XOR gate need not have a symbol mode view.

Please hand in a printout of your NAND gate (schematic and symbol view) and your XOR gate (schematic view). Also hand in your T-Spice code and the output plot.